| commit | 442d1e63f267c5cb4ef9ed6f2b11158af33da68e | [log] [tgz] |
|---|---|---|
| author | Igor Sysoev <igor@sysoev.ru> | Tue Jan 29 06:58:47 2008 +0000 |
| committer | Igor Sysoev <igor@sysoev.ru> | Tue Jan 29 06:58:47 2008 +0000 |
| tree | 88e6f3067cb34c2f8eb111e48f5f85e7bf3dce4c | |
| parent | 6e8bc2b72dd8f3620b72848ee3d372bf446d3c22 [diff] |
fix cache line size for Pentium 4
diff --git a/src/core/ngx_cpuinfo.c b/src/core/ngx_cpuinfo.c index 2ed26b8..587f978 100644 --- a/src/core/ngx_cpuinfo.c +++ b/src/core/ngx_cpuinfo.c
@@ -92,7 +92,7 @@ if (ngx_strcmp(vendor, "GenuineIntel") == 0) { - switch (cpu[0] & 0xf00) { + switch ((cpu[0] & 0xf00) >> 8) { /* Pentium */ case 5: